Design of reliable and energy-efficient high-speed interface circuits

The data-rate demand in high-speed interface circuits increases exponentially every year. High-speed I/Os are better implemented in advanced process technologies for lower-power systems, with the advantages of improved driving capability of the transistors and reduced parasitic capacitance. However, advanced technologies are not necessarily advantageous in terms of device reliability; in particular device failure from electrostatic discharge (ESD) becomes more likely in nano-scale process nodes. In order to secure ESD resiliency, the size of ESD devices on I/O pads should be sufficiently large, which may potentially reduce I/O speed. These two conflicting requirements in high-speed I/O design sometimes require sacrifice to one of the two properties. In this dissertation, three different approaches are proposed to achieve reliable and energy-efficient interface circuits. As the first approach, a novel ESD self-protection scheme to utilize “adaptive active bias conditioning” is proposed to reduce voltage stress on the vulnerable transistors, thereby reducing the burden on ESD protection devices. The second approach is to cancel out effective parasitic capacitance from ESD devices by the T-coil network. Voltage overshoot generated by magnetic coupling of the T-coil network can be suppressed by the proposed “inductance halving” technique, which reduces mutual inductance during ESD. The last approach employs system-level knowledge in the design of an ADC-based receiver for high intersymbol interference (ISI) channels. As a system-level performance metric, bit-error rate (BER) is adopted to mitigate a bit-resolution requirement in “BER-optimal ADC”, which can lead to 2× power-efficiency in the flash ADC and achieve a better BER performance

Dissecting the Shared Genetic Architecture of Suicide Attempt, Psychiatric Disorders, and Known Risk Factors

Background Suicide is a leading cause of death worldwide, and nonfatal suicide attempts, which occur far more frequently, are a major source of disability and social and economic burden. Both have substantial genetic etiology, which is partially shared and partially distinct from that of related psychiatric disorders. Methods We conducted a genome-wide association study (GWAS) of 29,782 suicide attempt (SA) cases and 519,961 controls in the International Suicide Genetics Consortium (ISGC). The GWAS of SA was conditioned on psychiatric disorders using GWAS summary statistics via multitrait-based conditional and joint analysis, to remove genetic effects on SA mediated by psychiatric disorders. We investigated the shared and divergent genetic architectures of SA, psychiatric disorders, and other known risk factors. Results Two loci reached genome-wide significance for SA: the major histocompatibility complex and an intergenic locus on chromosome 7, the latter of which remained associated with SA after conditioning on psychiatric disorders and replicated in an independent cohort from the Million Veteran Program. This locus has been implicated in risk-taking behavior, smoking, and insomnia. SA showed strong genetic correlation with psychiatric disorders, particularly major depression, and also with smoking, pain, risk-taking behavior, sleep disturbances, lower educational attainment, reproductive traits, lower socioeconomic status, and poorer general health. After conditioning on psychiatric disorders, the genetic correlations between SA and psychiatric disorders decreased, whereas those with nonpsychiatric traits remained largely unchanged. Conclusions Our results identify a risk locus that contributes more strongly to SA than other phenotypes and suggest a shared underlying biology between SA and known risk factors that is not mediated by psychiatric disorders.Peer reviewe

Influence of a micropatterned insert on characteristics of the tool-workpiece interface in a hard turning process

A micropatterned insert leads to decreases in cutting force, the coefficient of friction, and tool wear. This study prepared a pattern on the tool rake surface using layer-by-layer electrical discharge machining. Hard turning was investigated by measuring the cutting forces and chip morphologies. Friction was calculated by modeling continuous and saw-chip formation with various feed rates and surface velocities. Tool wear was measured using the increase in the material removal rate. The micropatterned insert decreased the force by 2.7 ??? 10.9% compared with the non-patterned insert because the friction was reduced by 9.5 ??? 34.5% with decreases in the feed rate and surface velocity. In comparison, the flank wear improved by 9.7 ??? 11.4% for the micropatterned insert compared with the non-patterned insert as the surface velocity decreased. Air gaps on the micropatterned insert cause the friction reduction due to additional shear deformation, escaping wear particles into apertures, reducing the contact area of the tool-chip, and uniform contact stress.close0

Automotive 2.1 μm Full-Depth Deep Trench Isolation CMOS Image Sensor with a 120 dB Single-Exposure Dynamic Range

An automotive 2.1 μm CMOS image sensor has been developed with a full-depth deep trench isolation and an advanced readout circuit technology. To achieve a high dynamic range, we employ a sub-pixel structure featuring a high conversion gain of a large photodiode and a lateral overflow of a small photodiode connected to an in-pixel storage capacitor. With the sensitivity ratio of 10, the expanded dynamic range could reach 120 dB at 85 °C by realizing a low random noise of 0.83 e- and a high overflow capacity of 210 ke-. An over 25 dB signal-to-noise ratio is achieved during HDR image synthesis by increasing the full-well capacity of the small photodiode up to 10,000 e- and suppressing the floating diffusion leakage current at 105 °C